1. Field of the Invention
This invention relates to microprocessors and, more particularly, to microprocessor prefetch instructions.
2. Description of the Related Art
Microprocessor designers have attempted to achieve higher performance through a variety of improvements to standard instruction sets such as the superscalar, reduced instruction set computer (RISC) architectures. For example, instructions may attempt to take advantage of multiple memory caches, arranged hierarchically and shared by multiple cores or execution units to hide memory latency. A variety of caching architectures are used and include various combinations of on-chip cache and off-chip cache. Since cache accesses are faster than memory accesses, various caching techniques are used to increase the likelihood that data is located in a cache when a core or execution unit needs to access it, thereby improving the bandwidth of memory access operations. Support for types of instructions know as prefetches may be added to microprocessor designs so that data or instructions may be loaded into cache memory before the microprocessor needs them. Prefetching data offers the performance advantage of the relatively faster access time of cache memory compared to system memory.
In addition to the above considerations, there are times when streams of data or large patterns of data may be needed by a microprocessor. Although prefetching data offers some performance advantages, repetitive execution of prefetch instructions to load a data stream or a large pattern of data may be inefficient. In addition, different specialized instructions that handle different patterns of data have been implemented. Each of these instructions may have its own unique format and semantics for communicating the structure of a data set between the programmer and the microprocessor's hardware. These differences complicate the job of programmers and compiler designers who attempt to use these instructions. In order to address the above concerns, what is needed is a way to improve prefetch instructions for a variety of data sets using consistent semantics.